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october 2009 ? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 fan6103 ? power supply supervisor plus pwm fan6103 power supply supervisor plus pwm features ? pc half-bridge power supply supervisor plus pwm ? high integration, few external components ? over-voltage protection for 3.3v, 5v, and 12v ? under-voltage protection for 3.3v, 5v, and 12v ? under-voltage protection for ?12v and/or ?5v ? over-power and short-circuit protection ? power-down warning circuitry ? power-good circuitry ? delay time for pson and pg signal ? remote on/off function ? on-chip oscillator and error amplifier ? latching pwm for cycle-by-cycle switching ? push-pull pwm operation and totem-pole outputs ? soft-start and maximum 93% duty cycle applications ? desktop pc power supply description fan6103 controller is designed for switching mode power supply for desktop pcs. it provides all the functions necessary to monitor and control the output of the power supply. remote on/off control, power good circuitry, and protection features against over-voltage and over-power are implemented. it directly senses all the output rails for ovp without the need of external dividers. an innovated ac-signal sampling circuitry provides a sufficient power-down warning signal for pg. a built-in timer generates accuracy timing for control circuit, including the ps-off delay. the cycle-by-cycle pwm switching prevents the power transformer from saturation and ensures the fastest response for the short-circuit protection, whic h greatly reduces the stress for power transistors. utilizing minimum external components, the fan6103 includes all of the functions for push-pull and/or half- bridge topology, decreasing the production cost and pcb space, while increasing the mean time between failures for power supply ordering information part number operating temperature range eco status package packing method FAN6103NZ -40c to +105c rohs 16-pin dual inline package (dip) tube for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/com pany/green/rohs_green.html .
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 2 fan6103 ? power supply supervisor plus pwm application diagram uvac 3.3v controller op1 op2 opp v dd v33 v5 v12 vcc pson nvp ri gnd in comp ss pg 5vsb pok pson -12v -5v 5v 12v -12v 3.3v fan6103 figure 1. typical application
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 3 fan6103 ? power supply supervisor plus pwm block diagram uv detector ov protector uv protector 3 7 2 dsd 5 bu ffe r bu ffe r 3.2v 2.1v 2.4v 64 a 5v 6 4 delay 7m s delay 7m s delay 15msec on/off delay 50 / 16ms 1.4v 1 v cc q q set clr d delay 2m s 0.7v v cc delay 3ms delay 300ms 8 a 2.5v 14 13 12 o.s.c q q set clr d q q set clr s r 9 8 10 11 16 15 v ref 2 a v33 v5 v12 uvac ri pg gnd vcc op1 op2 comp in ss pson opp nvp figure 2. function block diagram marking information figure 3. top mark f ? fairchild logo z ? plant code x ? 1-digit year code y ? 1-digit week code tt ? 2 -digit die run code t ? package type (n:dip) p ? z: pb free m ? manufacture flow code
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 4 fan6103 ? power supply supervisor plus pwm pin configuration figure 4. pin configuration pin definitions pin # name description 1 pson remote on/off logic input . turn on/off the pwm output after the 16ms / 50ms delay. pson = 0 means that the main smps is operational. pson = 1 means that the main sm ps is off and the latch is reset. 2 v33 3.3v over-voltage/under-voltage control sense input . 3 v5 5v over-voltage/under-voltage control sense input . 4 opp over-power sense input . this pin is connected to driver tr ansformer or the output of current transformer. when not in use, this pin should be grounded. 5 uvac ac-fail detection . detect main ac voltage under-voltage or failure. 6 nvp the protection input for negative output , such as ?12v and/or ?5v; trip voltage = 2.1v. 7 v12 12v over-voltage/under-voltage control sense input . 8 op2 the totem-pole output drivers of push-pull pwm . the output are enabled (low) only when the nand gate inputs are high; the maximum duty cycle on output op2 is 46%. 9 op1 the totem-pole output drivers of push-pull pwm . the output are enabled (low) only when the nand gate inputs are high the maximum duty cycle on output op1 is 46%. 10 pg power-good logic output, 0 or 1 (open-collector) . pg = 1 means that the power is ready for operation. the pg delay is 300ms. 11 gnd ground . 12 comp error amplifier output and the input of the pwm comparator . 13 in the negative input of error amplifier . the positive input of error amplifier is a 2.5v reference voltage. 14 ss the soft-start , it is settable through an external capacitor . the current source output at this pin is 8a and the voltage is clamped at 2.5v. 15 ri reference resistor . connected to external resistor for the reference setting. 16 vcc supply voltage ; 4.5v ~ 5.5v, connected to 5v standby.
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 5 fan6103 ? power supply supervisor plus pwm absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc dc supply voltage 16 v v h supply voltage on pson, v33, v5, v12, op1, op2 pins -0.3 16.0 v v l supply voltage on opp, uvac, ri, ss , nvp, in, comp, pg pins -0.3 7.0 v i out output current at pg 30 ma p d power dissipation t a < 50c 1500 mw ja thermal resistance (junction-to-air) 82.5 c/w t j operating junction temperature -40 +125 c t stg storage temperature range -55 +150 c t l lead temperature (soldering) +260 c esd electrostatic discharge capability human body model, jesd22-a114 3000 v charged device model, jesd22-c101 1250 notes: 1. all voltage values, except differential voltage, are given with respect to gnd pin. 2. stresses beyond those listed under absolute maximu m ratings may cause permanent damage to the device. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit t a operating ambient temperature -40 +105 c
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 6 fan6103 ? power supply supervisor plus pwm electrical characteristics v cc = 5v, t a = 25c, and r i = 75k ? unless otherwise noted. symbol parameter conditions min. typ. max. units v cc section v cc dc supply voltage 4.5 5.5 v i cc1 total supply current pson = low, op1/op2 = 1000pf 10 ma i cc2 total supply current pson = high, op1/op2 = 1000pf 5 10 ma protection section v ovp over-voltage protection 3.3v 3.9 4.1 4.3 v 5.0v 5.8 6.1 6.5 v 12.0v 13.9 14.5 14.9 v v uvp under-voltage protection 3.3v 2.0 2.6 2.8 v 5.0v 3.0 3.6 3.9 v 120v 6.0 7.2 8.0 v v uvs under-voltage sense for pg low 3.3v 2.5 2.8 3.0 v 5.0v 4.0 4.3 4.5 v 12.0v 9.4 10.1 10.4 v v opp over-power protection (with t opp delay time) (3) v uvac = 1.5v 2.25 2.32 2.39 v v opph over-power protection (without delay time) 3.0 3.2 3.4 v v x disable under-voltage / over- power protection threshold 0.2 0.3 0.4 v v nvp negative voltage protection voltage level 2.0 2.1 2.2 v i nvp negative voltage protection source current 63 67 71 a t ovp timing for over-voltage protection 0.37 0.70 1.35 ms t uvp timing for under-voltage protection 0.80 2.40 3.75 ms t uvs timing for under-voltage sense for pg low 0.37 1.20 1.88 ms t opp timing for over-power protection 5 7 9 ms t nvp timing for negative voltage protection 3.3 7.0 10.2 ms pwm output section v ol output voltage low 0.8 v v oh output voltage high 4 v r o output impedance of v oh 1.5 3.3 k ? note: 3. v opps = (2/3) ? v opp + (1/3) ? v uvac . continued on following page?
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 7 fan6103 ? power supply supervisor plus pwm electrical characteristics (continued) v cc = 5v, t a = 25c, and r i = 75k ? unless otherwise noted. symbol parameter conditions min. typ. max. units power-good section t pg timing for pg delay r i = 75k ? 200 300 400 ms v uvac uvac voltage sense for pg 0.68 0.70 0.72 v t r pg good output rising time c l = 100pf, pull 2.25v to 5.00v 1 3 s t f pg good falling time c l = 100pf, pull to 5.00v to 2.25v 300 500 ns v ol2 pg output saturation level i pg = 10ma 0.5 v i on2 pg leakage current collector v pg = 5v 1 a remote on/off section v ih high-level input voltage 2 v v il low-level input voltage 0.8 v v hysteresis pson input hysteresis voltage 0.3 v i pson remote input driving current 0.5 ma t pson(on) timing pson to on r i = 75k ? 38 50 62 ms t pson(off) timing pson to off r i = 75k ? 8 16 24 ms t psoff timing pg low to power off r i = 75k ? 1.5 2.0 6.3 ms error amplifier section v ref reference voltage t a = 25c 2.46 2.50 2.54 v i ib input bias current 0.1 a a vol open-loop voltage gain 50 60 db bw unity gain bandwidth 0.3 1.0 mhz psrr power supply rejection ratio 50 db oscillator section f osc pwm frequency r i = 75k ? 62 65 68 khz dc max max duty cycle 85 93 % soft-start section i ss charge current 7 8 9 a
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 8 fan6103 ? power supply supervisor plus pwm typical performance characteristics 3.9 4.0 4.1 4.2 4.3 4.4 4.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) i cc1 (ma) 2.40 2.45 2.50 2.55 2.60 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v ref (v) figure 5. operating supply current vs. temperature figure 6. reference voltage vs. temperature 6.55 6.59 6.63 6.67 6.71 6.75 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v oh (v) 61.0 62.0 63.0 64.0 65.0 66.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) f osc (khz ) figure 7. pwm output voltage vs. temperature figure 8. frequenc y vs. temperature 88.0 88.5 89.0 89.5 90.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) dc max (%) 7.85 7.87 7.89 7.91 7.93 7.95 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) i ss (a) figure 9. maximum duty cycle vs. temperature figure 10. charge curre nt vs. temperature
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 9 fan6103 ? power supply supervisor plus pwm typical performance characteristics (continued) 2.53 2.55 2.57 2.59 2.61 2.63 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v uvp (v) 4.00 4.05 4.10 4.15 4.20 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v ovp (v) figure 11. 3.3v v uvp vs. temperature figure 12. 3.3v v ovp vs. temperature 3.53 3.55 3.57 3.59 3.61 3.63 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v uvp (v) 6.00 6.05 6.10 6.15 6.20 6.25 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v ovp (v) figure 13. 5v v uvp vs. temperature figure 14. 5v v ovp vs. temperature 6.95 7.00 7.05 7.10 7.15 7.20 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v uvp (v) 14.40 14.45 14.50 14.55 14.60 14.65 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) v ovp (v) figure 15. 12v v uvp vs. temperature figure 16. 12v v ovp vs. temperature
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 10 fan6103 ? power supply supervisor plus pwm functional description fan6103 is suitable for half-bridge, push-pull topology and incorporates with a three-channel supervisor. the pwm section comprises a built-in 65khz oscillator and high-immunity circuits, whic h protect the system from noise interference and provide more noise margins. fan6103 has ovp and uvp for 12v, 5v, and 3.3v. nvp is used for negative voltage protection, such as - 12v and/or -5v. the uvac is applied to detect ac line condition. over-power protection (opp) fan6103 provides over-power protection to detect over-power or short-circui t conditions. when it detects the voltage level over 2.4v, the supervisor triggers pg to low and pulls the ss pin low to switch off the power. op1 op2 opp v dd figure 17. opp protection circuit negative-voltage protection (nvp) the nvp provides an under-voltage protection for negative voltage output. an under-voltage represents the phenomenal of the overload condition in negative voltage output. for example, the -12v output may drop to -10v during the overl oad situation. a resistor determining the threshold of the protection is connected from pin nvp to the negative voltage output. via this resistor, nvp output a 64a constant current to the negative voltage output. when the nvp voltage is over 2.1v for longer than 7ms, fan6103 locks the power output off: =++? 12 64 ( ) ( 12 ) nvp varrv (1) the power outputs are locked off when v nvp > 2.1v. r 1 r 2 -12v -5v 2.1v 64a 5v figure 18. nvp protection circuit ac-fail detection through a resistor divider, uvac is connected to the secondary power transformer for detecting the ac line condition. once the voltage of uvac is lower than 0.7v for a period of time, such as 200s, the pg signal is pulled low to indicate an ac line power-down condition. the voltage amplitude of the pwm switching signal in the secondary power transformer is proportional to the ac line voltage. adjust the ratio of resistor divider to determine the threshold of power- down warning. a small capacitor is connected from uvac to ground for filtering the switching noise. uvac 0.7v + figure 19. ac detection circuit
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 11 timing chart vcc pson 3.3v,5v,12v nvp t pson(on) t uvp t pson(off) t nvp ss(on/off) t psoff pg t pg vcc pson voltage < v uvac uvac opp t opp ss(on/off) pg figure 20. timing diagram
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 12 fan6103 ? power supply supervisor plus pwm physical dimensions 16 9 8 1 notes: unless otherwise specified a this package conforms to jedec ms-001 variation bb b) all dimensions are in millimeters. d) conforms to asme y14.5m-1994 e) drawing file name: n16erev1 19.68 18.66 6.60 6.09 c) dimensions are exclusive of burrs, mold flash, and tie bar protrusions 3.42 3.17 3.81 2.92 (0.40) 2.54 17.78 0.58 0.35 1.78 1.14 5.33 max 0.38 min 8.13 7.62 0.35 0.20 15 0 8.69 a a top view side view figure 21. 16-pin dual in-line package (dip) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and condition s, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fan6103 ? rev. 1.0.0 13 fan6103 ? power supply supervisor plus pwm

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